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2022 Annual Meeting - San Jose, CA

*Lodging information at bottom of page

Tuesday, October 18

8:00

Check-in/Breakfast  Room: Mezzanine/Salon A

8:30-9:00

State of the Center - Dr. Kiruba Haran  Room: Salon EF

9:00-10:45

Industry Project Updates - 15 min pres + 5 min Q&A  Room: Salon EF

10:45-11:15

Poster Session #1  Room: Mezzanine

  1. I1.018.21-Optimal 3D Spatial Packaging of Interconnected Systems with Physics Interactions (3D-SPI2)
  2. I1.020.21-Motor Winding Reliability Model
  3. I1.021.22-Battery Pack Power-Thermal Co-Management System Design Optimization for Enhanced Reliability and Safety Performances
  4. I1.022.22-Virtual Testbed for Fast Charging Battery Systems
  5. I2.019.21-Enablement of High-Voltage, High-Power Modules via Performance and Durability Validation of Direct Cooling, Voltage Blocking Technologies
  6. I2.020.22-Mathematic Modeling of Battery Thermal Runaway
  7. I3.021.21-Battery Pack Power-Thermal Co-Management System Design Optimization for Enhanced Reliability and Safety Performances
  8. REU - Manifold Geometric Optimization for Flow Cooling of Electronics with Monolithically Integrated Copper Heat Spreaders 
  9. R1.013.20-Design and Control Optimization of Complex, Multi-Domain Systems-of-Systems for Improved Power Density
  10. R2.033.20-Design of a High Temperature Integrated SiC Power Module with Optical Galvanic Isolation
  11. R3.030.20-Phase change material integration for power electronic device reliability
  12. R3.040.22-3D Printing of Aligned Single-Walled Carbon Nanotube (SWCNT) Films with Improved Thermal, Electrical, and Mechanical Properties​
11:15-12:00 Lunch Room: Salon A
12:00-2:00

Materials Workshop - Dr. Smith Room: Salon EF

Materials selection and development has been at the heart of POETS efforts since the start of the center; however, they take a significant amount of time to assess, develop, and mature. This session will explore the development and integration of new materials and materials systems for electro-thermal power density improvements

Agenda:

2:00-2:30

Poster Session #2  Room: Mezzanine

  1. R1.014.20-System level performance impacts of component and device level improvements
  2. R2.034.20-Heterogeneous SiC Power Modules with Active Cooling
  3. R3.032.20-Development of Copper Nanowires (CuNWs) Thermal Interface Materials (TIMs) with (Cu, Ni)–Sn, Transient Liquid Phase (TLP) Bonding, for High-Temperature Power Electronics Applications
  4. R1.015.20-Extension of POETS Packing and Routing Methods to Industry-Relevant 3D Electro-thermal Problems
  5. R2.035.20-Enabling Hi-Temp Capable, EMI Shielding & Responsible Custom Addistive thermal Management for Hi-V Switching Electronics
  6. R3.041.22-Packaged high-temperature AlN capacitors
  7. REU-Characterization of Flowing Dielectric Fluids for Cooling High Voltage Power Modules
  8. R1.016.20-Combined Electromigration and Mechanical Failure Risk in Interconnects: The Imminent Threat to Power Package Reliability
  9. R2.037.22-Converter-Integrated Variable-Pole Induction Machine Drive for Heavy-Duty Vehicles
  10. R3.035.20-High-speed GaN Triple Lateral-JFET Current Limiter
  11. R2.044.22-Thermal Modeling & Optimization of Wide Band Gap Transistors, Packaging, and Cooling Solutions for Power Electronics
  12. R1.018.20-A Multidisciplinary Design Optimization Framework for Efficient Design of eVTOLs
2:30-4:00 Student Industry Networking Event  Room: Salon H
4:00-5:00 Sustainability and Partnering on External Funding - John Wierschem   Room: Salons EF
4:15 Students visit Stanford Meet in the hotel lobby
4:50 Students - train leaves for Palo Alto/visit Stanford
6:00

Faculty/Staff/Guests - Explore San Jose!  *optional Open time for all participants to make their way through San Jose for dinner or just exploring.

San Jose Website: Restaurants, Nightlife, Things to Do

5:30 Students - Trains leave every 30 min from Palo Alto to San Jose until 1am
 

Wednesday, October 19

 

Research Track

Education Track

8:00 Breakfast  Room: Salon A
8:30-11:30

Technology Roadmapping- POETS Year 1 through 7  Room: Salons EF

Summary of Session

15 min: >10x Improvement of Power Density of Electric Systems - (Dr. Haran)

25 min: Materials and Devices (Dr. Miljkovic)

  • Electrical/thermal conductivity
  • Advanced passives
  • High temp
  • High-density thermal energy storage

25 min: Components and Subsystems (Dr. Huitink)

  • Electric machines
  • Fabrication methods
  • Power electronics

15 min: Systems and Testbeds (Dr. Mantooth)

  • Packaging
    • Spatial optimization
    • Power module layout
  • Integrated sensing
  • Integrated cooling
  • Testbeds

SLC Town Hall  Room: Salon H

60 min: Icebreaker session

60 min: Outreach

60 min: Townhall discussion about SLC and student brainstorming

 

11:30-12:00

Poster Session #3  Location: Mezzanine

  1. R1.020.22-PowerSynth 3D: Extending Design Automation from Modules to Converters
  2. R2.038.22-Microcooler Electro-Thermal Integration on GaN Devices Enables Ultra-High Power Density Converters with Robust Indirect Embedded Cooling
  3. R3.036.20-Benchmarking of Deployment-ready GaN Sensor and Amplification Electronics
  4. REU-Thermal PID Controller for Air Taxi EVTOL Reliability Testing
  5. R1.021.22-Integrated Thermal Management System (TMS) Design and Spatial Packaging Optimization for Battery Electric Vehicles (BEVs)
  6. R2.039.22-Design of A fast-switching SiC power module for high-temperature applications
  7. R3.037.22-High Temperature Solid State Batteries
  8. R1.017.20-Cold Plate Designer: A Software Tool to Rapidly Design High-Performance Lightweight Cold Plates with Heterogeneous Cooling Capability
  9. R2.040.22-Multi-fidelity Modeling and Sensor Data Fusion for Partial Discharge Diagnosis and Reliability Assessment
  10. R3.038.22-Replacing the Solder Ball Technology: Development of a Compliant Electrical (EIMs) and Thermal Interface Materials (TIMs) Interconnects using Copper Nano-wires (CuNWs)
  11. R2.041.22-High Power Density 6-in-1 SiC Power Module with Integrated Double-sided Micro-channel Cooling
  12. R2.031.20-Testbed Integration of Lithium-Ion Battery Packs with Novel Thermal Management Systems
12:00-1:00

Lunch - Closed Sessions

  • Industry closed session (Owen Doyle)  Room: Monterey Room 
  • Student closed session (Dr. Krein)  Room: Salon H
  • Faculty Closed session (Dr. Haran)  Location: Salon A
1:00-2:00

Technology Roadmapping - POETS Year 8 and Beyond  Room: Salons EF 

30 min: Moving forward on the below topics

  • >10x Improvement of Power Density of Electrified Systems
  • Materials and Devises
  • Components and Subsystems
  • Systems and Testbeds

30 min: Wrap-up - Topics to continue, topics to sunset

2:00-3:00 Open
3:00

Enjoy San Francisco's Fisherman's Wharf! *optional

Meet in the lobby of the hotel

4:00

Arrive in San Francisco at Pier 39

7:00

Load bus at Pier 39 location for transport back to San Jose

7:15 Bus departs

 

Lodging & Event Venue

Holiday In San Jose-Silicon Valley

1350 N. First St.

San Jose, CA 95112 

Tel. (408) 453-6200 

Hotel accommodation Link.  

Downtown San Jose Map

VTA main map

 

Updated 10132022